1. Field of the Invention
The present invention relates generally to integrated circuit fabrication. More particularly, the present invention relates to build-up layer technology that is used to fabricate on-package structures. In particular, the present invention relates to a process of fabricating an inductor during the build-up layer fabrication.
2. Description of Related Art
Electronic components such as inductors are impacted by the trend of miniaturization that adds challenges to continued high quality. For example inductors are required in miniaturized devices that may include a power regulator in an integrated circuit, or a component in a low power application such as a hand-held device. Due to effect of electrostatic noise that may be produced by an inductor, an efficient inductor may adversely impact on-silicon circuitry. Consequently, inductors are often supplied as discrete components and are mounted off chip. A disadvantage of of-chip mounting is that the stub length causes skew in the required response characteristics of the inductor or other device.
What is needed is a process of forming an inductor that overcomes the problems in the prior art.